Design Verification Conference (DVCon 2007)
March 19, 2007 at 3:07 pm 1 comment
I was recently attending the Design Verification Conference (DVCon) 2007 in San Jose. My first impression was that there was lack of energy and activity. It perhaps only reflects the amount of action that is taking place in the US at this point. The attendance was far fewer compared to a similar conference back in India.
Of course, you usually find a lot of “free-riders” in India as my friend calls people who attend these events for the goodies.
There were lot of good papers published at this years’ DVCON, though some of them were re-runs from earlier conferences. I came to meet most of the “who-is-who”s in EDA and Verification, in particular.
John Cooley’s Troublemakers’ panel was interesting and worthwhile attending. It was studded with incisive questions from Cooley’s readers and also featured some inflammatory arguments between the big wigs from Mentor, Synopsys, Magma and Cadence.
The panel on “Blended Coverage” was meant to be educational but it was mostly a dump of what the panelists have been doing at their companies with no new information. Barring a couple of them, none of the other panelists had any point, or didn’t make any, even if they had one.
Overall, you could clearly see that the action is all here in our own Bangalore inspite of all its problems. The trend seems to be towards more work shifting here, with more inspired young blood, eager to learn. There were significantly fewer number of booths by companies, but it was heartening to see the number of them working primarily on verification.
Again, to validate my theory on the shifting of action to India, all I got for registering in the conference was a cheap lunch bag compared to the numerous goodies you get in Indian conferences these days 🙂
Entry filed under: ASIC Verification, Bangalore, Chip, Conference, DVCon, India, NRI, San Jose, Semiconductor, Silicon, VLSI.
Musings on Indian Semiconductor Industry 
1.
Ap Lee | January 29, 2008 at 10:23 am
From your comments, ASIC design and verification jobs are inexorably moving out of north america into asia. I work in north america, and I heard that for the price of one north american asic engineer, companies can afford three engineers in india. It is also said that the quality is of ASIC engineers is lower in india.
Personnaly, I think this is temporary: I think indian engineers will eventually catch up (and they probably have already but north america has not realized it yet).
I think 1) north america has become complacent, and 2) companies want to pay as little as possible for salaries, so high tech is moving out of north america, just like car making and textile have. Ten years ago, I used to get a dozen phone calls per year from head hunters, and now I get one or two per year maximum.
Enjoy the growth while it lasts, it is exciting. I hope it lasts a long time for you and may india have lots of well paid engineers.